Question regarding the arm gcc 5.3 to build android

/tmp/ccZ40ViQ.s:1752: Error: selected processor does not support ARM mode
`cbnz r6,.L91'

Looking at gcc, I see that in thumb2 mode, for a conditional branch,
it will emit cbnz if the target is in range and it is using a thumb2
low register, otherwise it emits cmp/bne. So this perhaps could be a
bug with the compiler calculating instruction sizes wrong, and hence
getting the range calculation from the branch to the target label
wrong. We would need a reproducible testcase to investigate. The
easiest way to do this if to add --save-temps to the g++ command, and
then send us the UnwindCurrent.ii file. We also need the g++ command
line, but you already gave us that. Otherwise, we have to figure out
how to build AOSP with gcc-5.3. I'm not sure if anyone on the
toolchain team is doing that regularly.

There could also be something else going wrong here, e.g. the code
could have extended asms using cbnz which aren't valid in thumb2 mode,
the assembler could be somehow in thumb1 mode, etc, but these seem
less likely in this case.

Jim

Jim Wilson

2016-03-31 04:47:30 UTC

Thanks a lot for your quick response. The .ii file was attached.

In UnwindFromContext, there is an asm that forces the assembler into ARM mode.

if (ucontext == nullptr) {
int ret = (({ unw_tdep_context_t *unw_ctx = (&context_); register unsigned \
long *unw_base asm ("r0") = unw_ctx->regs; __asm__ __volatile__ ( ".align 2\nbx\
pc\nnop\n.code 32\n" "stmia %[base], {r0-r15}\n" "orr %[base], pc, #1\nbx %[ba\
se]" : [base] "+r" (unw_base) : : "memory", "cc"); }), 0);

The ".code 32" puts us in ARM mode.

GCC still thinks that we are in thumb mode though, and continues to
emit thumb instructions, some of which have no arm mode equivalent,
e.g. cbnz and cbz.

I don't see any convenient push/pop for thumb/arm mode. This is
probably a macro expanded into the asm. You could have two versions
of the asm, one that gets used when __thumb__ is defined and one that
gets used when __thumb__ is not defined. The __thumb__ version would
switch back into thumb mode at the end with a ".thumb" pseudo-op.

Or alternatively, don't build with -mthumb.

Jim

fengwei.yin

2016-03-31 06:07:46 UTC

Hi Jim,

Thanks a lot for your quick response. The .ii file was attached.

In UnwindFromContext, there is an asm that forces the assembler into ARM mode.
if (ucontext == nullptr) {
int ret = (({ unw_tdep_context_t *unw_ctx = (&context_); register unsigned \
long *unw_base asm ("r0") = unw_ctx->regs; __asm__ __volatile__ ( ".align 2\nbx\
pc\nnop\n.code 32\n" "stmia %[base], {r0-r15}\n" "orr %[base], pc, #1\nbx %[ba\
se]" : [base] "+r" (unw_base) : : "memory", "cc"); }), 0);
The ".code 32" puts us in ARM mode.
GCC still thinks that we are in thumb mode though, and continues to
emit thumb instructions, some of which have no arm mode equivalent,
e.g. cbnz and cbz.
I don't see any convenient push/pop for thumb/arm mode. This is
probably a macro expanded into the asm. You could have two versions
of the asm, one that gets used when __thumb__ is defined and one that
gets used when __thumb__ is not defined. The __thumb__ version would
switch back into thumb mode at the end with a ".thumb" pseudo-op.
Or alternatively, don't build with -mthumb.

The thing is gcc 4.9 has no such problem. And I don't think it's possible to
disable thumb because it's a global flag for AOSP build.

I'd like to understand why Bero has no such issue in his side.

Regards
Yin, Fengwei

Post by Jim Wilson
Jim

Jim Wilson

2016-03-31 17:26:42 UTC

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

There is a patch in gcc-5 to make unified assembler syntax the
default. Unfortunately, it changes how extended asms work, which is
perhaps a bug. The message claims it doesn't affect extended asms,
but it does.
https://gcc.gnu.org/ml/gcc-patches/2015-11/msg01196.html
The interesting bit is the change to ASM_APP_OFF.

gcc-4.9 emits a .thumb after the extended asm to switch back into
thumb mode just in case. gcc-5.3 instead emits .syntax unified, which
doesn't change the arm/thumb mode, just the syntax supported. This is
arguably a bug, but this doesn't immediately help you. It could take
a little time to get gcc-5.x source fixed, and then the compiler
binary releases. Or alternatively we could fix the asm to work with
gcc 5.

Jim

fengwei.yin

2016-04-01 00:04:34 UTC

Hi Jim,

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

There is a patch in gcc-5 to make unified assembler syntax the
default. Unfortunately, it changes how extended asms work, which is
perhaps a bug. The message claims it doesn't affect extended asms,
but it does.
https://gcc.gnu.org/ml/gcc-patches/2015-11/msg01196.html
The interesting bit is the change to ASM_APP_OFF.
gcc-4.9 emits a .thumb after the extended asm to switch back into
thumb mode just in case. gcc-5.3 instead emits .syntax unified, which
doesn't change the arm/thumb mode, just the syntax supported. This is
arguably a bug, but this doesn't immediately help you. It could take
a little time to get gcc-5.x source fixed, and then the compiler
binary releases. Or alternatively we could fix the asm to work with
gcc 5.

Thanks a lot for looking at this.

I think fixing asm is the thing we should try here. Removing thumb is not
acceptable because we use gcc5.3 for AOSP for memory reduction.

This part of code was from libunwind actually. And it's defined like:

/* There is no getcontext() on ARM. Use a stub version which only saves GP
registers. FIXME: Not ideal, may not be sufficient for all libunwind
use cases. Stores pc+8, which is only approximately correct, really. */
#ifndef __thumb__
#define unw_tdep_getcontext(uc) (({ \
unw_tdep_context_t *unw_ctx = (uc); \
register unsigned long *unw_base asm ("r0") = unw_ctx->regs; \
__asm__ __volatile__ ( \
"stmia %[base], {r0-r15}" \
: : [base] "r" (unw_base) : "memory"); \
}), 0)
#else /* __thumb__ */
#define unw_tdep_getcontext(uc) (({ \
unw_tdep_context_t *unw_ctx = (uc); \
register unsigned long *unw_base asm ("r0") = unw_ctx->regs; \
__asm__ __volatile__ ( \
".align 2\nbx pc\nnop\n.code 32\n" \
"stmia %[base], {r0-r15}\n" \
"orr %[base], pc, #1\nbx %[base]" \
: [base] "+r" (unw_base) : : "memory", "cc"); \
}), 0)
#endif

Remove the __thumb__ part?

Regards
Yin, Fengwei

Post by Jim Wilson
Jim

Jim Wilson

2016-04-01 01:30:34 UTC

Post by fengwei.yin
Remove the __thumb__ part?

If you remove the __thumb__ part, then you will get an assembler error.

palantir:2025$ arm-linux-gnueabi-as UnwindCurrent.s
UnwindCurrent.s: Assembler messages:
UnwindCurrent.s:1504: Error: PC not allowed in register list -- `stmia
r0,{r0-r15}'
palantir:2026$

This instruction is not a valid thumb instruction. It is a valid arm
instruction, but deprecated. The assembler gives an error because you
are in thumb mode. Since you already have a __thumb__ version of the
macro, you can put a ".thumb" directive at the end of the asm, after
the orr instruction, to manually switch back into thumb mode.

Jim

fengwei.yin

2016-04-01 01:32:32 UTC

Post by fengwei.yin
Remove the __thumb__ part?

If you remove the __thumb__ part, then you will get an assembler error.
palantir:2025$ arm-linux-gnueabi-as UnwindCurrent.s
UnwindCurrent.s:1504: Error: PC not allowed in register list -- `stmia
r0,{r0-r15}'
palantir:2026$
This instruction is not a valid thumb instruction. It is a valid arm
instruction, but deprecated. The assembler gives an error because you
are in thumb mode. Since you already have a __thumb__ version of the
macro, you can put a ".thumb" directive at the end of the asm, after
the orr instruction, to manually switch back into thumb mode.

Cool. Thanks a lot. I will try it.

Post by Jim Wilson
Jim

Ramana Radhakrishnan

2016-04-01 09:52:36 UTC

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

The patch was intended to make unified asm as default for ARM state without
having any impact with respect to unified / divided syntax for inline assembler.

The change to remove .arm and .thumb is a thinko and clearly a bug : I'll fix it shortly upstream.

regards
Ramana

Post by Jim Wilson
gcc-4.9 emits a .thumb after the extended asm to switch back into
thumb mode just in case. gcc-5.3 instead emits .syntax unified, which
doesn't change the arm/thumb mode, just the syntax supported. This is
arguably a bug, but this doesn't immediately help you. It could take
a little time to get gcc-5.x source fixed, and then the compiler
binary releases. Or alternatively we could fix the asm to work with
gcc 5.
Jim
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Ramana Radhakrishnan

2016-04-01 10:04:01 UTC

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

This is now https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 for FSF trunk.

Sorry about the breakage.

Ramana

Christophe Lyon

2016-04-03 19:58:18 UTC

On 1 April 2016 at 12:04, Ramana Radhakrishnan

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

This is now https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 for FSF trunk.
Sorry about the breakage.
Ramana

As Ramana fixed it promptly on trunk, we'll backport it and it will
be available in our next linaro-gcc-5.x snapshot.

Thanks,

Christophe.

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fengwei.yin

2016-04-04 13:11:33 UTC

Hi Christophe,

Post by Christophe Lyon
On 1 April 2016 at 12:04, Ramana Radhakrishnan

Because gcc 4.9 could build this file without any issue, I apply
--save-temps
with gcc 4.9. The ii file is attached. Can't see significant differences.

This is now https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 for FSF trunk.
Sorry about the breakage.
Ramana

As Ramana fixed it promptly on trunk, we'll backport it and it will
be available in our next linaro-gcc-5.x snapshot.

Thanks a lot. I will try once the next snapshot is ready.

Regards
Yin, Fengwei

Post by Christophe Lyon
Thanks,
Christophe.