Discussion:
[ACTIVITY] 13th - 17th April
Bernie Ogden
2015-04-20 07:48:05 UTC
Permalink
Benchmark automation - TCWG-360 [5/10]
* Flushed the rest of the easy stuff from my 'small fixups' to my
'staging' branch
* Started rolling generic patches from my backport-benchmark branch into gerrit
* Prodded at the prototype backport-benchmark job until the pieces worked
** Ran out of time to try an end-to-end run
* Thought a little about permissions for access to source/results
* Use of nc.traditional appears to have introduced a race condition

catomics - TCWG-436 [2/10]
* Tried a run on A15 - same story as A57, good improvement on g8 libc
ubenchmark that doesn't translate into SPEC subset
* Performance counting the ubenchmark suggests variation around cache
accesses on the catomic vs not-catomic code, didn't have any time to
think about what, if anything, this means

Misc [3/10]
* Featuring an unusual level of ARM interruption
* Especially concerns about change from multiarch to non-multiarch
sysroot in binary releases


=Plan=

Confirm backport benchmarking working, roll remaining generic patches
into gerrit
Investigate the nc.traditional race
Add a retry loop around LAVA boot (occasionally see LAVA-fail here)
Create unit tests
Follow up on (non-)multiarch sysroot issue
Kugan
2015-04-20 12:28:40 UTC
Permalink
== Progress ==
* Upstream GCC (7/10)
- Rebased and posted/prepared patches for gcc stage1 for the following
- TCWG-780 - Improve register allocation for
aarch64_*_sisd_or_int<mode>3 patterns
- TCWG-779 - Improve codegen for vld2q_f32 and vst2q_f32
- TCWG-486 - Optimize Constant Uses in Loops
- Zero/sign extension elimination with vrp
- Vector rtx costs for AArch64


* Misc (1/10)
- gcc-patches, gcc-bugs list
- Meetings

== Plan ==
Continue with gcc stage1 activities

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