Yvan Roux
2015-12-17 12:01:22 UTC
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2015.12 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn231642 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2015.11
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn231642
* Backport of [Bugfix] [AArch32] 1/4 PR63870 Add qualifiers for NEON builtins
* Backport of [Bugfix] [AArch32] 2/4 PR63870 Mark lane indices of
vldN/vstN with appropriate qualifier
* Backport of [Bugfix] [AArch32] 3/4 PR63870 Remove error for invalid
lane numbers
* Backport of [Bugfix] [AArch32] 4/4 PR63870 Remove xfails for ARM targets
* Backport of [Bugfix] [AArch32] PR67305, tighten
neon_vector_mem_operand on eliminable registers
* Backport of [Bugfix] [AArch32] remove unused variable
* Backport of [Bugfix] [AArch64] PR 63304 Fix issue with global state
* Backport of [Bugfix] [AArch64] PR63304 Handle literal pools for
functions > 1 MiB in size
* Backport of [Bugfix] [AArch64] PR 68088: Fix RTL checking ICE due to
subregs inside accumulator forwarding check
* Backport of [Bugfix] [AArch64] PR rtl-optimization/67218
* Backport of [Bugfix] PR 56036 fix typo in doc
* Backport of [Bugfix] PR rtl-optimization/68236: Exit early from
autoprefetcher lookahead if not in haifa sched
* Backport of [Bugfix] PR tree-optimization/68234 Improve range info
for loop Phi node
* Backport of [AArch32] 1/4 Change GET_MODE_INNER to always return a
non-void mode
* Backport of [AArch32] 2/3 Make if_neg_move and if_move_neg into insn_and_split
* Backport of [AArch32] 2/4 Control the FMA steering pass in tuning
structures rather than as core property
* Backport of [AArch32] 3/3 Expand mod by power of 2
* Backport of [AArch32] 3/4 Replace the pattern GET_MODE_BITSIZE
(GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m)
* Backport of [AArch32] 4/4 Fix - Introduce new inline functions for
GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION
* Backport of [AArch32] 4/4 Introduce new inline functions for
GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION
* Backport of [AArch32/AArch64] 2/2 Add a new Cortex-A53 scheduling model
* Backport of [AArch32] Add missing v8a cpus to the t-aprofile file
* Backport of [AArch32] Fix checking RTL error in cortex_a9_sched_adjust_cost
* Backport of [AArch32] Fix for testcase after r228661
* Backport of [AArch32] Initialise cost to COSTS_N_INSNS (1) and
increment in arm rtx costs
* Backport of [AArch32] libgcc: include crtfastmath
* Backport of [AArch32] Unified assembler in ARM state
* Backport of [AArch64] 1/2 Give AArch64 ROR (Immediate) a new type attribute
* Backport of [AArch64] 1/2 Rename SYMBOL_SMALL_GOT to SYMBOL_SMALL_GOT_4G
* Backport of [AArch64] 1/2 Rename test source file for reuse
* Backport of [AArch64] 1/3 Add the option -mtls-size
* Backport of [AArch64] 1/3 Expand signed mod by power of 2 using CSNEG
* Backport of [AArch64] 2/2 Implement -fpic for -mcmodel=small
* Backport of [AArch64] 2/2 Implement TLS IE for tiny model
* Backport of [AArch64] 2/3 Rename SYMBOL_TLSLE to SYMBOL_TLSLE24
* Backport of [AArch64] 3/3 Implement local executable mode for all memory model
* Backport of [AArch64] Add initial qualcomm support
* Backport of [AArch64] Add missing entries in iterator vwcore
* Backport of [AArch64] Cleanup whitespace in aarch64.c
* Backport of [AArch64] Cortex-A57 Choose some new branch costs
* Backport of [AArch64] Define TARGET_UNSPEC_MAY_TRAP_P
* Backport of [AArch64] Distinct costs for sign and zero extension
* Backport of [AArch64] Do not ICE after apologising for -mcmodel=large -fPIC
* Backport of [AArch64] Don't allow -mgeneral-regs-only to change the
.arch assembler directives
* Backport of [AArch64] Don't transform sign and zero extends inside mults
* Backport of [AArch64] Fall back to -fPIC if no support of -fpic in binutils
* Backport of [AArch64] Fix for branch offsets over 1 MiB
* Backport of [AArch64] Fix ICE on (const_double:HF 0.0)
* Backport of [AArch64] Fix insn types
* Backport of [AArch64] Fix output assembly bug under TLSIE ILP32
* Backport of [AArch64] Handle vector float modes properly in
aarch64_output_simd_mov_immediate
* Backport of [AArch64] Mark GOT related MEM rtx as const to help RTL loop IV
* Backport of [AArch64] Properly handle simple arith+extend ops in rtx costs
* Backport of [AArch64] Rename SYMBOL_SMALL_GOTTPREL to SYMBOL_SMALL_TLSIE
* Backport of [AArch64] Restrict pic-small.c by new test directive
* Backport of [AArch64] Tighten direct call pattern for sibcall to
repair -fno-plt
* Backport of [AArch64] Tighten direct call pattern to repair -fno-plt
* Backport of [Testsuite] [AArch32] Fix thumb2-slow-flash-data.c failures
* Backport of [Testsuite] [AArch32] Switch ARM to unified asm
* Backport of [Testsuite] [AArch64] Add more TLS local executable testcases
* Backport of [Testsuite] [AArch64] Check branch types for noplt testcases
* Backport of [Testsuite] [AArch64] Fix gcc.target/aarch64/vclz.c
* Backport of [Testsuite] [AArch64] Fix some target attribute inlining
tests for -fPIC
* Backport of [Testsuite] [AArch64] Restrict got_mem_hoist_1.c with
small memory model
* Backport of [Testsuite] [AArch64] Skip tiny and large code model on
gcc.target/aarch64/pic-small.c
* Backport of [Testsuite] Add --param
sra-max-scalarization-size-Ospeed to sra-12.c
* Backport of [Testsuite] Fix target selector in
gcc.target/i386/noplt-[1234].c testcases
* Backport of [Misc] Allow sibcalls in no-PLT PIC
* Backport of [Misc] Eliminate PLT stubs for specified external
functions via -fno-plt
* Backport of [Misc] Fix for ICE with -g on testcase with incomplete types
* Backport of [Misc] Fix memory leak and wrong invariant dependence
computation in IVOPT
* Backport of [Misc] Improve rtl loop inv cost by checking if the inv
can be propagated to address uses
* Backport of [Cleanup] [AArch32/AArch64] fix ChangeLog
* Backport of [cleanup] [AArch32] Remove uses of CONST_DOUBLE_HIGH/LOW
* Backport of [Cleanup] [AArch64] Delete aarch64_symbol_context which
is not used
* Backport of [cleanup] [AArch64] Move iterators from atomics.md to iterators.md
* Backport of [cleanup] [AArch64] Remove uses of CONST_DOUBLE_HIGH,
CONST_DOUBLE_LOW
* Backport of [Doc] [AArch64] Document several AArch64-specific test directives
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:***@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
2015.12 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn231642 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2015.11
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn231642
* Backport of [Bugfix] [AArch32] 1/4 PR63870 Add qualifiers for NEON builtins
* Backport of [Bugfix] [AArch32] 2/4 PR63870 Mark lane indices of
vldN/vstN with appropriate qualifier
* Backport of [Bugfix] [AArch32] 3/4 PR63870 Remove error for invalid
lane numbers
* Backport of [Bugfix] [AArch32] 4/4 PR63870 Remove xfails for ARM targets
* Backport of [Bugfix] [AArch32] PR67305, tighten
neon_vector_mem_operand on eliminable registers
* Backport of [Bugfix] [AArch32] remove unused variable
* Backport of [Bugfix] [AArch64] PR 63304 Fix issue with global state
* Backport of [Bugfix] [AArch64] PR63304 Handle literal pools for
functions > 1 MiB in size
* Backport of [Bugfix] [AArch64] PR 68088: Fix RTL checking ICE due to
subregs inside accumulator forwarding check
* Backport of [Bugfix] [AArch64] PR rtl-optimization/67218
* Backport of [Bugfix] PR 56036 fix typo in doc
* Backport of [Bugfix] PR rtl-optimization/68236: Exit early from
autoprefetcher lookahead if not in haifa sched
* Backport of [Bugfix] PR tree-optimization/68234 Improve range info
for loop Phi node
* Backport of [AArch32] 1/4 Change GET_MODE_INNER to always return a
non-void mode
* Backport of [AArch32] 2/3 Make if_neg_move and if_move_neg into insn_and_split
* Backport of [AArch32] 2/4 Control the FMA steering pass in tuning
structures rather than as core property
* Backport of [AArch32] 3/3 Expand mod by power of 2
* Backport of [AArch32] 3/4 Replace the pattern GET_MODE_BITSIZE
(GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m)
* Backport of [AArch32] 4/4 Fix - Introduce new inline functions for
GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION
* Backport of [AArch32] 4/4 Introduce new inline functions for
GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION
* Backport of [AArch32/AArch64] 2/2 Add a new Cortex-A53 scheduling model
* Backport of [AArch32] Add missing v8a cpus to the t-aprofile file
* Backport of [AArch32] Fix checking RTL error in cortex_a9_sched_adjust_cost
* Backport of [AArch32] Fix for testcase after r228661
* Backport of [AArch32] Initialise cost to COSTS_N_INSNS (1) and
increment in arm rtx costs
* Backport of [AArch32] libgcc: include crtfastmath
* Backport of [AArch32] Unified assembler in ARM state
* Backport of [AArch64] 1/2 Give AArch64 ROR (Immediate) a new type attribute
* Backport of [AArch64] 1/2 Rename SYMBOL_SMALL_GOT to SYMBOL_SMALL_GOT_4G
* Backport of [AArch64] 1/2 Rename test source file for reuse
* Backport of [AArch64] 1/3 Add the option -mtls-size
* Backport of [AArch64] 1/3 Expand signed mod by power of 2 using CSNEG
* Backport of [AArch64] 2/2 Implement -fpic for -mcmodel=small
* Backport of [AArch64] 2/2 Implement TLS IE for tiny model
* Backport of [AArch64] 2/3 Rename SYMBOL_TLSLE to SYMBOL_TLSLE24
* Backport of [AArch64] 3/3 Implement local executable mode for all memory model
* Backport of [AArch64] Add initial qualcomm support
* Backport of [AArch64] Add missing entries in iterator vwcore
* Backport of [AArch64] Cleanup whitespace in aarch64.c
* Backport of [AArch64] Cortex-A57 Choose some new branch costs
* Backport of [AArch64] Define TARGET_UNSPEC_MAY_TRAP_P
* Backport of [AArch64] Distinct costs for sign and zero extension
* Backport of [AArch64] Do not ICE after apologising for -mcmodel=large -fPIC
* Backport of [AArch64] Don't allow -mgeneral-regs-only to change the
.arch assembler directives
* Backport of [AArch64] Don't transform sign and zero extends inside mults
* Backport of [AArch64] Fall back to -fPIC if no support of -fpic in binutils
* Backport of [AArch64] Fix for branch offsets over 1 MiB
* Backport of [AArch64] Fix ICE on (const_double:HF 0.0)
* Backport of [AArch64] Fix insn types
* Backport of [AArch64] Fix output assembly bug under TLSIE ILP32
* Backport of [AArch64] Handle vector float modes properly in
aarch64_output_simd_mov_immediate
* Backport of [AArch64] Mark GOT related MEM rtx as const to help RTL loop IV
* Backport of [AArch64] Properly handle simple arith+extend ops in rtx costs
* Backport of [AArch64] Rename SYMBOL_SMALL_GOTTPREL to SYMBOL_SMALL_TLSIE
* Backport of [AArch64] Restrict pic-small.c by new test directive
* Backport of [AArch64] Tighten direct call pattern for sibcall to
repair -fno-plt
* Backport of [AArch64] Tighten direct call pattern to repair -fno-plt
* Backport of [Testsuite] [AArch32] Fix thumb2-slow-flash-data.c failures
* Backport of [Testsuite] [AArch32] Switch ARM to unified asm
* Backport of [Testsuite] [AArch64] Add more TLS local executable testcases
* Backport of [Testsuite] [AArch64] Check branch types for noplt testcases
* Backport of [Testsuite] [AArch64] Fix gcc.target/aarch64/vclz.c
* Backport of [Testsuite] [AArch64] Fix some target attribute inlining
tests for -fPIC
* Backport of [Testsuite] [AArch64] Restrict got_mem_hoist_1.c with
small memory model
* Backport of [Testsuite] [AArch64] Skip tiny and large code model on
gcc.target/aarch64/pic-small.c
* Backport of [Testsuite] Add --param
sra-max-scalarization-size-Ospeed to sra-12.c
* Backport of [Testsuite] Fix target selector in
gcc.target/i386/noplt-[1234].c testcases
* Backport of [Misc] Allow sibcalls in no-PLT PIC
* Backport of [Misc] Eliminate PLT stubs for specified external
functions via -fno-plt
* Backport of [Misc] Fix for ICE with -g on testcase with incomplete types
* Backport of [Misc] Fix memory leak and wrong invariant dependence
computation in IVOPT
* Backport of [Misc] Improve rtl loop inv cost by checking if the inv
can be propagated to address uses
* Backport of [Cleanup] [AArch32/AArch64] fix ChangeLog
* Backport of [cleanup] [AArch32] Remove uses of CONST_DOUBLE_HIGH/LOW
* Backport of [Cleanup] [AArch64] Delete aarch64_symbol_context which
is not used
* Backport of [cleanup] [AArch64] Move iterators from atomics.md to iterators.md
* Backport of [cleanup] [AArch64] Remove uses of CONST_DOUBLE_HIGH,
CONST_DOUBLE_LOW
* Backport of [Doc] [AArch64] Document several AArch64-specific test directives
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:***@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.